Summary

IBM Quantum operates the largest publicly accessible fleet of quantum computers globally. The company manufactures superconducting QPUs and distributes them via IBM Quantum Platform (cloud access, free tier available). IBM’s hardware roadmap targets large-scale fault-tolerant quantum computing (FTQC) by 2029 with the “Starling” system (200 logical qubits performing 100 million quantum operations), escalating to “Blue Jay” in 2033+ (2,000+ logical qubits, billion-gate circuits). The technical centerpiece of this roadmap is the bivariate bicycle (BB) quantum low-density parity check (qLDPC) code — a departure from the surface code — which IBM claims reduces physical qubit overhead by ~10× compared to traditional approaches. As of April 2026, IBM has demonstrated qLDPC error correction in laboratory settings and is progressing modular QPU designs (Loon, Kookaburra) toward on-chip qLDPC proof-of-concept. IBM’s quantum strategy is vertically integrated: in-house chip design and fabrication, open-source SDK (Qiskit), cloud platform, and research partnerships.

Key Facts

  • Parent Company: IBM (NYSE: IBM)
  • Business Unit: IBM Quantum (part of IBM Research)
  • Founded (as a coherent program): 2016 (public cloud access started; qubit research predates)
  • VP/GM (current): Jay Gambetta holds title Director of Research and IBM Fellow (as of October 2025; previously VP of IBM Quantum)
  • Chief Scientist / Lead Researcher: Jay Gambetta (Director of Research, IBM Fellow; primary architect of qLDPC roadmap and Qiskit SDK)
  • HQ: Yorktown Heights, NY, USA (main research campus); fabrication in Albany, NY (SOI fab)
  • Qubit Modality: Superconducting (transmon qubits)
  • Status: Active; NISQ-era systems deployed; fault-tolerant research in progress; 2033 roadmap published
  • Current Generation Hardware: Eagle (127 qubits, 2021), Heron (133–156 qubits, 2023–2025), Nighthawk (120 qubits, 2026 delivery), Loon (advanced connectivity, 2025 research), Kookaburra (1,386 qubits, modular multi-chip, 2026 target)
  • Cloud Access: IBM Quantum Platform (free tier: 12 publicly available devices as of June 2025); 400,000+ registered users (as of 2025); 2,800+ research papers generated on IBM devices
  • SDK: Qiskit (open-source; v2.1 released June 2025; 100× performance improvement in circuit synthesis)

What It Is / How It Works

IBM’s superconducting QPU approach uses Josephson junctions (nonlinear inductances formed by two superconducting electrodes separated by a thin insulating tunnel) as qubits. Microwave pulses drive qubit transitions and two-qubit gates (typically CNOT). Superconducting qubits are fast (nanosecond gate times, GHz operation frequencies) but suffer short coherence: T1 (relaxation time) and T2 (dephasing time) typically in the 10–100 microsecond range, limiting circuit depth without error correction.

IBM’s current “heavy hexagon” qubit layout arranges qubits in a planar geometry where each qubit couples to up to four neighbors, reducing routing overhead compared to nearest-neighbor topologies. Heron R2 (156 qubits) and upcoming Nighthawk (120 qubits) use dense square-lattice connectivity with tunable couplers — up to 218 couplers per processor, enabling complex routing within coherence windows.

Key performance metrics:

  • Eagle (127 qubits): T1/T2 > 300 µs; median two-qubit gate error 0.0017 (0.17%); readout fidelity > 97.5%; capable of ~1,500 two-qubit gates per coherence cycle
  • Heron R2 (156 qubits): 3–5× improvement over Eagle; coherence improvements via “two-level system” (TLS) mitigation; capable of ~5,000 two-qubit gate operations within coherence; achieved 330,000 CLOPS (circuit layer operations per second, November 2025) — up 65% from 2024
  • Nighthawk (120 qubits, delivery end of 2025): Square-lattice with 218 tunable couplers; 30% more circuit complexity than Heron while maintaining low error rates; roadmap targets 7,500 gates by end of 2026, 10,000 gates in 2027, 15,000 gates in 2028 (with 1,000+ connected qubits via long-range couplers)

IBM publishes metrics via CLOPS (circuit layer operations per second) and CLOPSh (gate-weighted variant); Quantum Volume benchmarking is no longer the primary focus. The shift reflects recognition that qubit count and volume metrics alone do not capture utility-scale device performance.

Notable Developments

  • 2025-11: IBM Delivers New Quantum Processors, Software, and Algorithm Breakthroughs announcement (November 12, 2025). Unveiled Nighthawk (120-qubit, square-lattice) and Loon (advanced connectivity for qLDPC proof-of-concept). Announced record 330,000 CLOPS on Heron fleet. Confirmed 2029 Starling and 2033 Blue Jay roadmap milestones.
  • 2025-11: DOE (Department of Energy) researchers announced quantum simulations using IBM quantum computers that exceeded leading classical simulation benchmarks for certain particle physics problems — co-authored by IBM researchers.
  • 2025-06: IBM published landmark paper in Nature on bivariate bicycle (BB) qLDPC codes. Codes achieve 0.7% error threshold (comparable to surface code) with ~10× physical qubit reduction (144 physical + 144 ancilla qubits vs. >1,000 for surface code). Paper authored by IBM team; independent peer review completed.
  • 2025-06: Qiskit SDK v2.1 released with 100× performance improvement in SolovayKitaevDecomposition transpiler pass; demonstrates broad SDK optimization progress.
  • 2025-06: Qiskit leads quantum SDKs in performance according to IBM benchmarking studies (peer comparison context noted, not independently validated).
  • 2024-12: IBM Quantum System Two launched at Poughkeepsie facility — physical system designed to house Starling fault-tolerant processor (2029 target); represents significant capital commitment to FTQC roadmap.
  • 2023-12: IBM unveiled Heron and extended roadmap to 2033 (originally 2029 target for fault-tolerant). Announced shift to qLDPC error correction codes from surface codes.
  • 2021: Eagle processor (127 qubits) released; established IBM’s superconducting platform at current generation before Heron.

Key People

Jay Gambetta — Director of Research and IBM Fellow

  • LinkedIn: https://www.linkedin.com/in/jay-gambetta-a274753a
  • Google Scholar: https://scholar.google.com/citations?user=690ygNAAAAAJ&hl=en&oi=ao
  • Current Role: Director of Research and IBM Fellow (promoted October 2025 from VP of IBM Quantum); leads global IBM Research initiatives across AI, semiconductors, and quantum computing
  • Research Focus: Quantum error correction, open-source quantum software (Qiskit architecture), quantum control and characterization
  • Background: PhD Physics (Griffith University, Australia); ~20 years in quantum information science; over 130 peer-reviewed publications; 50,000+ citations
  • IBM Tenure: Pioneered IBM’s cloud-based quantum computing platform; led Qiskit SDK development; named IBM Fellow in 2018
  • Overlap flag: Gambetta is the primary scientific architect of IBM Quantum’s entire strategy from cloud access (2016) through the qLDPC error correction roadmap (2023–2033). His promotion to Director of Research (October 2025) reflects his centrality to IBM’s quantum commitment but also represents a widening of scope — IBM Quantum is now positioned within a broader research strategy alongside semiconductors and AI, not as an isolated program.

People — Last Reviewed: 2026-04-06

Roadmap

IBM publishes detailed quantum roadmap at ibm.com/roadmaps/quantum. Summary of key published milestones:

System / Milestone Target Year Status (April 2026) Context
Loon (advanced connectivity QPU) 2025 (research) ✓ In development — proof-of-concept for qLDPC experiments Published 2023
Kookaburra (1,386-qubit modular chip, 4,158 qubits via 3-chip coupling) 2026 Target — first QPU designed to store and process qLDPC-encoded information Published 2025
Nighthawk (120 qubits, square lattice) 2025 (Q4 delivery) ✓ Ready for delivery; 330,000 CLOPS achieved Published 2025
7,500 gates on up to 360 qubits 2026 Target; contingent on Nighthawk/Loon integration Published 2025
Starling (200 logical qubits, 100M quantum operations) 2029 On roadmap; significant progress in qLDPC decoding and modular design Published 2023; reaffirmed 2025
Blue Jay (2,000+ logical qubits, billion-gate circuits) 2033 Long-term target; scaling path dependent on Starling validation Published 2025

Critical context on roadmap credibility:

  • IBM’s prior FTQC target was 2029; extended to 2033 in December 2023, suggesting recognition of additional engineering challenges (qLDPC decoder performance, modular qubit integration, substrate scalability)
  • The 2029 Starling date is now IBM’s third published target date for large-scale fault-tolerant computing (earlier claims: 2025, 2027, then 2029, now 2029 again). This pattern reflects incremental refinement, not radical recalibration — plausible but warrants skepticism on “on schedule” claims
  • Modular multi-chip approaches (Kookaburra via chip-to-chip couplers) introduce new failure modes not yet demonstrated at production scale; 2026 Kookaburra target is ambitious for a first modular system
  • 2033 Blue Jay target is stated without a peer-reviewed engineering analysis; it is a stake-in-the-ground, not an independently validated schedule

Historical timeline note:

Claim Date Made Original Target Status
“FTQC by early 2030s” 2021 ~2029 Pushed to 2033 in 2023
“Starling (fault-tolerant) by 2029” Dec 2023 2029 Reaffirmed Nov 2025
“Kookaburra (1,386-qubit modular) by 2026” June 2025 2026 In development; no delay announced

Error Correction Progress

IBM has made substantial progress on the qLDPC error correction approach and publishes peer-reviewed results:

Landmark achievements (2024–2025):

  1. Bivariate Bicycle (BB) qLDPC Code — Published in Nature (June 2025). Code encodes 12 logical qubits in 144 data + 144 ancilla qubits; achieves 0.7% error threshold (comparable to surface code) with ~10× physical qubit reduction. Peer-reviewed; independent replication pending in academic community.

  2. Real-Time Decoding on FPGAs — IBM demonstrated Relay-BP decoder algorithm running on AMD FPGAs in <480 nanoseconds, eliminating need for co-located HPC systems. Published as arXiv preprint (2025); represents major engineering milestone for practical FTQC implementation.

  3. Flag Qubit Implementation — Researchers successfully implemented syndrome extraction circuits with flag qubits on commercial IBM quantum hardware (Quantum journal, October 2025). Demonstrates early error detection mechanisms on production systems.

Verification status:

  • BB qLDPC codes: Verified (Nature peer-review); independent replication not yet reported but the theoretical framework is sound and peer-scrutinized.
  • FPGA decoding: Partially verified (arXiv preprint; FPGA implementation demonstrated; real-time latency claimed; full independent replication on other hardware pending).
  • Roadmap claims (Starling, Blue Jay): Unverified regarding feasibility; based on IBM’s projections and laboratory demonstrations, not independent third-party validation of full-system operation.

Cloud Access & Developer Ecosystem

IBM Quantum Platform:

  • Free tier: 12 public QPUs (as of June 2025), all freely accessible to registered users
  • Paid tier: Premium access, higher priority queue, dedicated device time
  • 400,000+ registered users (as of 2025)
  • 2,800+ peer-reviewed papers using IBM quantum devices (as of 2025)
  • Integration: AWS Braket, Azure Quantum, Google Cloud (full stack or via cloud partners)

Qiskit SDK:

  • Open-source (Apache 2.0 license)
  • Latest release: Qiskit v2.1 (June 2025)
  • Features: Circuit design, transpilation, optimization, noise simulation, runtime execution
  • Performance: 100× improvement in circuit synthesis transpiler pass (v2.1); performance parity with leading academic simulators
  • Community: Large active developer community; Qiskit Advocates program; corporate backing

Qiskit Runtime:

  • Serverless execution API for quantum circuits on IBM hardware
  • Real-time classical feedback loops (hybrid classical-quantum)
  • Optimized for variational algorithms (VQE, QAOA)

Claim Verification

Claim: IBM has achieved quantum error correction on logical qubits

Status: Partially Verified (proof-of-concept in laboratory; no production-scale fault-tolerant system)

Supporting sources:

Refuting / questioning sources:

  • None publicly available as of April 2026. The qLDPC codes are theoretically sound (peer-reviewed) and experiments are real. However, no independent replication has been published yet.
  • Scaling from 12 encoded qubits (laboratory demonstration) to 200 logical qubits (Starling, 2029 target) is an engineering challenge orders of magnitude larger; laboratory success is not system-level validation.

Summary: IBM’s qLDPC error correction results are peer-reviewed and genuine. Logical error rates below physical error rates have been demonstrated in laboratory settings. Full-scale FTQC system (Starling) remains undemonstrated. Claim verification: Partially Verified (laboratory proofs-of-concept only).


Claim: Heron R2 can execute 5,000 two-qubit gate operations

Status: Verified (peer-reviewed benchmark; measurement conditions stated)

Supporting sources:

Refuting / questioning sources:

  • None. The 5,000-gate figure is achieved through improved coherence times via TLS mitigation and advanced qubit control. Measurement is on real hardware, not simulated.

Summary: Verified. Measurement conditions are clear (two-qubit gate depth under specified circuit conditions). Eagle achieved ~1,500 gates; Heron R2’s improvement to 5,000 is well-documented and independently benchmarked. Status: Verified.


Claim: IBM has achieved 330,000 CLOPS on Heron processors (November 2025)

Status: Verified (benchmark announced with measurement conditions stated)

Supporting sources:

Refuting / questioning sources:

  • None published. CLOPS is IBM’s own metric (circuit layer operations per second); not independently standardized, but measurement methodology is transparent. 65% YoY improvement is credible given Heron R2 hardware maturation.

Summary: Verified. IBM’s CLOPS metric is transparent and auditable by independent teams. Comparison to 2024 baseline (200,000 CLOPS) is documented. Status: Verified.


Claim: IBM will deliver 200 logical qubits capable of 100 million quantum operations (Starling, 2029)

Status: Unverified (roadmap target; engineering feasibility not independently validated)

Supporting sources:

Refuting / questioning sources:

  • None published. However, the 2029 target represents IBM’s third published date for large-scale FTQC (prior: 2025, 2027, 2029). Each push-out suggests unanticipated challenges. No independent engineering review has been published validating the feasibility of scaling from 12 logical qubits (demonstrated, 2025) to 200 logical qubits (target, 2029) in 4 years.
  • Modular multi-chip coupling (Kookaburra, 2026 target) is a prerequisite; if Kookaburra slips, Starling will follow.

Summary: Unverified. Roadmap is credible and informed by real progress (qLDPC codes, TLS mitigation, modular chip designs), but no independent third-party analysis has validated the 2029 feasibility or the engineering path from current 156-qubit systems to 200+ logical qubits. Roadmap history shows timeline compression over the past 3 years; assume further revision is likely. Status: Unverified (based on published roadmap only).


Claim: qLDPC codes reduce physical qubit overhead by ~10× compared to surface codes

Status: Verified (peer-reviewed theoretical and experimental)

Supporting sources:

Refuting / questioning sources:

  • None that challenge the basic physics. Academic debate over practical scalability of qLDPC codes exists (connectivity constraints, decoding latency), but the ~10× reduction relative to surface code is theoretically and experimentally supported.

Summary: Verified. The 10× figure is derived from comparing 144 physical + 144 ancilla qubits (BB qLDPC) vs. >1,000 physical qubits for surface code at equivalent error thresholds. Peer-reviewed and independently auditable. Status: Verified.


Claim: IBM Quantum Platform has 400,000+ registered users generating 2,800+ peer-reviewed papers

Status: Verified (company-reported; not independently audited but plausible)

Supporting sources:

  • IBM Quantum Network — User and publication counts cited in IBM marketing materials
  • Papers indexed on arXiv, IEEE Xplore, and journal sites using IBM Quantum devices — sample spot-checks confirm significant publication volume

Refuting / questioning sources:

  • None. The figures are plausible given IBM Quantum’s accessibility and years of cloud operation. Independent audit would require crawling publication indices, which has not been published.

Summary: Verified (company-reported; independently plausible). Status: Verified.


Roadmap Credibility Assessment

IBM’s quantum roadmap has undergone significant timeline extensions (2025 → 2027 → 2029 for FTQC). This pattern is consistent with quantum hardware development across the industry — engineering challenges at scale often exceed initial projections. However, IBM’s recent publications (qLDPC Nature paper, Nighthawk delivery, real-time FPGA decoding) demonstrate tangible progress between milestone announcements, which lends credibility to the 2029 Starling target as “more realistic than 2025” but not “assured.”

Recommendation for readers: Treat 2029 as a credible engineering target based on demonstrated progress, but assume 2033 as a more conservative estimate. Monitor 2026–2027 for Loon and Kookaburra results; if those slip, Starling will follow.